g0b1vetx-board/Core/Src/stm32g0xx_it.c
2023-05-19 18:02:00 +08:00

261 lines
7.1 KiB
C

/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g0xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32g0xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "wwdg.h"
#include "iwdg.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_adc1;
extern DMA_HandleTypeDef hdma_lpuart1_rx;
extern UART_HandleTypeDef hlpuart1;
extern UART_HandleTypeDef hlpuart2;
extern UART_HandleTypeDef huart1;
extern UART_HandleTypeDef huart2;
extern UART_HandleTypeDef huart3;
extern UART_HandleTypeDef huart4;
extern UART_HandleTypeDef huart5;
extern UART_HandleTypeDef huart6;
extern SPI_HandleTypeDef hspi2;
extern TIM_HandleTypeDef htim7;
extern TIM_HandleTypeDef htim14;
extern TIM_HandleTypeDef htim2;
/* USER CODE BEGIN EV */
extern void MX_UART_IRQHandle (void);
extern void MX_UART_TickHandle (void);
//extern void main_Systick (void);
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M0+ Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/******************************************************************************/
/* STM32G0xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32g0xx.s). */
/******************************************************************************/
/**
* @brief This function handles DMA1 channel 1 interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel 2 and channel 3 interrupts.
*/
void DMA1_Channel2_3_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
/* USER CODE END DMA1_Channel2_3_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_lpuart1_rx);
/* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */
/* USER CODE END DMA1_Channel2_3_IRQn 1 */
}
/**
* @brief This function handles DMA1 Ch4 to Ch7, DMA2 Ch1 to Ch5 and DMAMUX1 Overrun Interrupts.
*/
void DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn 0 */
/* USER CODE END DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn 0 */
// Handle DMAMUX
// Handle DMA1_Channel1
HAL_DMAEx_MUX_IRQHandler(&hdma_adc1);
/* USER CODE BEGIN DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn 1 */
/* USER CODE END DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn 1 */
}
/**
* @brief This function handles TIM2 global interrupt.
*/
void TIM2_IRQHandler(void)
{
/* USER CODE BEGIN TIM2_IRQn 0 */
MX_UART_TickHandle();
//main_Systick();
MX_IWDG_Reload();
MX_WWDG_Relad();
/* USER CODE END TIM2_IRQn 0 */
HAL_TIM_IRQHandler(&htim2);
/* USER CODE BEGIN TIM2_IRQn 1 */
/* USER CODE END TIM2_IRQn 1 */
}
/**
* @brief This function handles TIM7 and LPTIM2 global Interrupt.
*/
void TIM7_LPTIM2_IRQHandler(void)
{
/* USER CODE BEGIN TIM7_LPTIM2_IRQn 0 */
/* USER CODE END TIM7_LPTIM2_IRQn 0 */
HAL_TIM_IRQHandler(&htim7);
/* USER CODE BEGIN TIM7_LPTIM2_IRQn 1 */
/* USER CODE END TIM7_LPTIM2_IRQn 1 */
}
/**
* @brief This function handles TIM14 global interrupt.
*/
void TIM14_IRQHandler(void)
{
/* USER CODE BEGIN TIM14_IRQn 0 */
/* USER CODE END TIM14_IRQn 0 */
HAL_TIM_IRQHandler(&htim14);
/* USER CODE BEGIN TIM14_IRQn 1 */
/* USER CODE END TIM14_IRQn 1 */
}
/**
* @brief This function handles SPI2/I2S2, SPI3/I2S3 Interrupt.
*/
void SPI2_3_IRQHandler(void)
{
/* USER CODE BEGIN SPI2_3_IRQn 0 */
/* USER CODE END SPI2_3_IRQn 0 */
HAL_SPI_IRQHandler(&hspi2);
/* USER CODE BEGIN SPI2_3_IRQn 1 */
/* USER CODE END SPI2_3_IRQn 1 */
}
/**
* @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/**
* @brief This function handles USART2 + LPUART2 Interrupt.
*/
void USART2_LPUART2_IRQHandler(void)
{
/* USER CODE BEGIN USART2_LPUART2_IRQn 0 */
MX_UART_IRQHandle();
/* USER CODE END USART2_LPUART2_IRQn 0 */
HAL_UART_IRQHandler(&huart2);
HAL_UART_IRQHandler(&hlpuart2);
/* USER CODE BEGIN USART2_LPUART2_IRQn 1 */
/* USER CODE END USART2_LPUART2_IRQn 1 */
}
/**
* @brief This function handles USART3, USART4, USART5, USART6, LPUART1 globlal Interrupts (combined with EXTI 28).
*/
void USART3_4_5_6_LPUART1_IRQHandler(void)
{
/* USER CODE BEGIN USART3_4_5_6_LPUART1_IRQn 0 */
MX_UART_IRQHandle();
/* USER CODE END USART3_4_5_6_LPUART1_IRQn 0 */
HAL_UART_IRQHandler(&huart3);
HAL_UART_IRQHandler(&huart4);
HAL_UART_IRQHandler(&huart5);
HAL_UART_IRQHandler(&huart6);
HAL_UART_IRQHandler(&hlpuart1);
/* USER CODE BEGIN USART3_4_5_6_LPUART1_IRQn 1 */
/* USER CODE END USART3_4_5_6_LPUART1_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */