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引入mqtt 引入cjson

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2584532475@qq.com committed 2023-11-30 08:10:01 +08:00
1 parent a69c1a58d6
commit f8591b8b99
86 files changed
+12141 -2157
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Core/Src/dma.c
+13 -13
View File
@@ -36,22 +36,22 @@
/**
* Enable DMA controller clock
*/
void MX_DMA_Init(void)
void MX_DMA_Init (void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
/* DMA1_Channel2_3_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
/* DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn);
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority (DMA1_Channel1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ (DMA1_Channel1_IRQn);
/* DMA1_Channel2_3_IRQn interrupt configuration */
HAL_NVIC_SetPriority (DMA1_Channel2_3_IRQn, 0, 0);
HAL_NVIC_EnableIRQ (DMA1_Channel2_3_IRQn);
/* DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn interrupt configuration */
HAL_NVIC_SetPriority (DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn, 0, 0);
HAL_NVIC_EnableIRQ (DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQn);
}